Forward Deployed Engineer (FDE) for AI and GenAI Inference Optimization
📣 Job Ad| Contract Type | Full-time | |
| Workplace type | On-site | |
| Location | Riyadh |
Job Description
About the Role
AMD is seeking a Forward Deployed Engineer (FDE) for AI and GenAI Inference Optimization to join the team in Riyadh. This full-time role involves working directly with strategic partners and customers to enable, optimize, and deploy state-of-the-art GenAI inference workloads on AMD data center CPUs and GPUs (Instinct™ family). The successful candidate will bridge the gap between cutting-edge AI models and AMD hardware, aiming to drive competitive performance across the full inference stack. This position requires 5-10 years of relevant experience.
Key Responsibilities
- Partner with customers to enable and optimize large language models (LLMs) and multimodal models on AMD Instinct GPUs, meeting committed performance and accuracy targets.
- Optimize GenAI inference pipelines on vLLM and SGLang, including PD disaggregation, expert parallelism (EP/wide-EP), tensor/data parallelism, speculative decoding, and KV cache management.
- Develop and tune low-level GPU kernels (Triton, HIP, composable kernels) for attention, MoE, GEMM, quantization, and normalization operations.
- Profile end-to-end workloads, identify bottlenecks across GPU/CPU boundaries, and deliver measurable throughput and latency improvements against competitive targets.
- Enable advanced data types and techniques (FP8, MXFP4, sparse attention) with a focus on both performance and numerical accuracy.
- Debug complex runtime, stability, and accuracy issues in production environments; collaborate with core engineering teams to identify root causes and contribute fixes.
- Contribute optimizations back to open-source frameworks (vLLM, SGLang, ATOM, AITER) and internal libraries; document best practices and deliver production-ready artifacts to customers.
- Leverage AI-assisted coding tools and agentic workflows to accelerate development, debugging, optimization, and code review across the inference stack.
Required Qualifications
- BS, MS, or PhD in Computer Science, Electrical Engineering, or a related field, along with 8+ years of relevant experience.
- Solid expertise in GPU architecture and performance optimization, including hands-on experience with AMD ROCm (or CUDA) and GPU kernel development.
- Strong proficiency in Python and C++, with experience developing and optimizing kernels using Triton, HIP, or CUDA.
- Experience with AI-assisted coding and agentic development tools (*, GitHub Copilot, Claude, Cursor, or equivalent) to enhance productivity in kernel development, large-scale codebase navigation, debugging, and framework integration.
- Experience working with LLM inference frameworks (vLLM, SGLang, or equivalent) and serving optimization techniques.
- Solid understanding of transformer and MoE architectures, quantization, and distributed inference strategies (TP, DP, EP, and related parallelism techniques).
- Proficiency with profiling and debugging tools (*, rocProfiler, ROCdebug-agent).
Preferred Qualifications
- Experience optimizing frontier models (DeepSeek, Qwen, Kimi, MiniMax, GLM, etc.) in production environments.
- Track record of contributing to open-source AI inference frameworks.
- Experience integrating AI-driven automation into engineering workflows and developer tooling.
- Strong customer-facing communication skills and the ability to manage technical deliverables against committed timelines.
Company Overview
At AMD, technology is leveraged to address significant global challenges, from advancing healthcare and scientific discovery to powering AI and everyday technologies. Innovation at AMD contributes to shaping the future. Every role at AMD supports the development of technology that moves the world forward.
Requirements
- Requires 5-10 Years experience
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